Bp 379 en
Embedded module for image processing
Author: Petr Čížek
This thesis propose a system design for image processing and mobile robot navigation specifically suitable for the architecture of the Field-programmable Gate Arrays (FPGAs). The image processing part of the design consists of the image feature detector based on the Speeded Up Robust Features (SURF) algorithm and the image feature descriptor based on the Binary Robust Independent Elementary Features (BRIEF) algorithm. The image processing part is completely implemented in the FPGA fabric. The navigation algorithm is designed as a software for the embedded processor of the module. It is based on the SURFnav navigation algorithm developed on the Faculty of Electrical Engineering of the CTU. This thesis also provides the reader with the background of the mobile robot navigation and image feature extraction methods. The image feature detector part of the design is evaluated in the end of this thesis.
- Čížek Petr, tel: +420 732 979 542, mailto:cizekpet@gmail.com
- Krajník Tomáš, mailto:tkrajnik@labe.felk.cvut.cz
